Before you write to us
Frequently asked questions
The questions that come up most often in a first conversation. If yours is not here, write to us.
- Which process nodes do you support?
- Our team has worked down to 2nm GAA nodes, covering custom layout, circuit design and IP integration. Solutions span GlobalFoundries, Samsung and TSMC platforms, with silicon-proven delivery at 2nm on both Samsung and TSMC.
- How do your engagement models work?
- From fixed-scope to time-and-materials, with the ability to scale resources and onboard quickly depending on what the project needs.
- Do you offer IP ownership or licensing?
- Both. We develop custom IP for exclusive customer ownership, and we license selected reusable blocks.
- How long does a project usually take?
- It depends on complexity. Small IP blocks can be delivered in weeks, while full-chip programmes may run several months. We agree a delivery plan up front.
- Can you work inside our EDA flow?
- Yes. Our teams integrate with your internal design and layout team, environment and tools, including Cadence, Synopsys and custom flows.
- Where are your design teams based?
- Our design team is based in Edinburgh, Scotland.
- Do you support tapeout and post-silicon work?
- Yes. With our partners we support tapeout logistics, and we collaborate on post-silicon validation, bring-up and debug alongside your test teams.